Requirements:

  CS or EE background. Good programming skills. Cancommunicate in English. Willing to learn to use EDA (Electronic DesignAutomation) tools.

  Familiar with digital design, Verilog or VHDL is aplus.

Job Description:

  Working as intern for Synopsys Verification Group.Learn to use EDA tools, work together with Senior engineers, and use C/C++, TCLto complete the projects on Linux.

About Synopsys

  Synopsys, Inc., headquartered in Mountain View, California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.

Shanghai Office: 长宁路1027号兆丰广场 （中山公园）

PS:

本人所在的组，其实对EDA的行业的知识要求不是太多，有最好，有些概念可能上手快一点，没有也没关系，都是纯软的开发。

过来应该做的是VHDL/Verilog语言的验证相关，主要技术要求为UNIX上的C/C++开发，技术大牛比较多，可以学到不少东西，来了不会做的是打杂的活。

这边上班环境非常不错，实习待遇也算是比较好的，最近有想换实习的可以看看。

简历可以发我邮箱：gjzhang@synopsys.com

300一天啊。。。